Verilog 8-Bit ALU (Arithmetic Logic Unit)
The objective of this project was to use the "Spartan-3E" board and make an 8-Bit binary ALU.
Inputs to the system: the 4 switches, button #4(east).
Outputs: 8 Leds.
The button would be used as the clock to the system to progress thru the stages of execution of the ALU.
The switches are the input to the system. The switch to far left represent the most significant bit and the switch to the far right represent the least significant bit.
The 8 leds are going to represent the output of our 8 bit computation. The LED to far left represent the most significant bit and the LED to the far right represent the least significant bit.
In Stage 3 and 8 if the switches had the value X11X (X meaning don’t care) it will negate the operands.
At Stage 5 toggling the switches would set the desired operation.
Switches Value Operation Selected
0000 Addition
0001 Subtraction
0010 Multiplication
0011 Division
Project files can be downloaded at the end of the page, Have Fun!!
Here is an Example on how the execution should preform:
Inputs to the system: the 4 switches, button #4(east).
Outputs: 8 Leds.
The button would be used as the clock to the system to progress thru the stages of execution of the ALU.
The switches are the input to the system. The switch to far left represent the most significant bit and the switch to the far right represent the least significant bit.
The 8 leds are going to represent the output of our 8 bit computation. The LED to far left represent the most significant bit and the LED to the far right represent the least significant bit.
In Stage 3 and 8 if the switches had the value X11X (X meaning don’t care) it will negate the operands.
At Stage 5 toggling the switches would set the desired operation.
Switches Value Operation Selected
0000 Addition
0001 Subtraction
0010 Multiplication
0011 Division
Project files can be downloaded at the end of the page, Have Fun!!
Here is an Example on how the execution should preform:
![](http://www.weebly.com/weebly/images/file_icons/txt.png)
modulefile.txt |
![](http://www.weebly.com/weebly/images/file_icons/txt.png)
constraintfile.txt |
![](http://www.weebly.com/weebly/images/file_icons/txt.png)
testbench.txt |